Details, datasheet, quote on part number: SK10EL52W
CategoryLogic => Flip-Flops
DescriptionDifferential Data And Clock D Flip-flop
CompanySemtech Corporation
DatasheetDownload SK10EL52W datasheet
Cross ref.Similar parts: SY10EL52Z


Features, Applications

The is a differential data, differential clock D flip-flop. This device is fully compatible with MC10/100EL52 and functionally equivalent to the E452 devices, with higher performance capabilities. With propagation delays and output transition times significantly faster than the E452, the EL52W is ideally suited for those applications which require the ultimate in AC performance. Data enters the master portion of the flip-flop when the clock is LOW and is transferred to the slave, and thus the outputs, upon a positive transition of the clock. The differential clock inputs also allow the to be used as a negative edge triggered device. The EL52W employs input clamping circuitry so that, under open input conditions (pulled down to VEE), the outputs of the device will remain stable.


Extended Supply Voltage Range: (VEE to ­5.5V, VCC 0V) or (VCC to +5.5V, VEE 365 ps Propagation Delay 2.0 GHz Toggle Frequency Internal 75KW Input Pull-Down Resistors Fully Compatible with MC10EL52 and MC100EL52 Specified Over Industrial Temperature Range: to +85oC ESD Protection of >4000V Available in 8-Pin SOIC Package

Pin D, D* CLK, CLK* Function Data Input Clock Input Data Output

NOTES: 1. Dimensions are in millimeters. 2. Dimensions D and do no include mold protrusion. 3. Maximum mold protrusion 0.15 per side. 4. Dimension B does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.127 total in excess of the B dimension at maximum material condition.

40 oC Symbol IIN Characteristic Input Current Power Supply Current 10EL 100EL Power Supply Voltage Min -150 Typ Max 150 Min 0 oC Typ Max 150 Min 25 oC Typ Max 150 Min 85 oC Typ Max 150 Unit ľA

40 oC Symbol fMAX tPLH tPHL tS tH tPW VPP VCMR , tf Characteristic Maximum Toggle Frequency Propagation Delay to Output CLK Setup Time Hold Time Minimum Pulse Width Minimum Input Swing CLK3 Common Mode Range4 D, CLK Output Rise/Fall Times Qn, Qn* to 80%) Min 1.8 Typ 2.5 Max Min 2.2


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