Details, datasheet, quote on part number: 7025ERPQE-35
Part7025ERPQE-35
Category
Description(8K x 16-bit) Dual Port RAM High-speed CMOS
CompanyMaxwell Technologies
DatasheetDownload 7025ERPQE-35 datasheet
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Features, Applications

x 16-bit dual port RAM - Stand Alone - Master Slave RAD-PAKŪ radiation-hardened against natural space radiation Total dose hardness: > 100 krad (Si), depending upon space mission Excellent Single Event Effects: -SELTH LET >100 MeV/mg/cm2 -SEUTH LET 7 MeV/mg/cm2 Package: -84 Pin RAD-PAKŪ quad flat pack Separate upper byte and lower byte control for multiplexed bus compatibility High speed access time: 35/45 ns Expandable to 32 bits or more using master/slave select when cascading High speed CMOS technology -TTL compatible, single 5V power supply -Interrupt flag for port-to-port communication -On chip port arbitration logic -Asynchronous operation from either port

Maxwell Technologies' 7025E Dual Port RAM High Speed CMOSŪ microcircuit features a greater than 100 krad (Si) total dose tolerance, depending upon space mission. The 7025E is designed to be used as a stand-alone 128k-bit Dual Port RAM as a combination MASTER/SLAVE Dual-Port RAM for 32bit or more word systems. This design results in full-speed, error-free operation without the need for additional discrete logic. The 7025E provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power down feature controlled by CS permits the on-chip circuitry of each port to enter a very low standby power mode. Maxwell Technologies' patented RAD-PAKŪ packaging technology incorporates radiation shielding in the microcircuit package. It eliminates the need for box shielding while providing the required radiation shielding for a lifetime in orbit or space mission. In a GEO orbit, RAD-PAK provides greater than 100 krad (Si) radiation dose tolerance. This product is available with screening up to Class S.

All data sheets are subject to change without notice

NAMES Chip Select Read/Write Select Output Select Address Data Input/Output Semaphore Select Upper Byte Select Lower Byte Select Interrupt Flag Busy Flag M/S VCC GND LEFT PORT CSL R/WL OSL AOL-A12L I/OOL-I/O15L SEML UBL LBL INTL BUSYL RIGHT PORT CSR R/WR OSR AOR-A12R I/OOR-I/O15R SEMR UBR LBR INTR BUSYR Master or Slave Select Power Ground

PARAMETER Supply Voltage (Relative to VSS) Operating Temperature Range Input or Output Voltage Applied Storage Temperature Range SYMBOL VCC TA -TSTG MIN -0.3 -55 GND -0.3V -65 MAX 7.0 125 VCC+ 0.3 150 UNITS V

PARAMETER ICCOP ICCOP1 ICCSB ICCSB1 VARIATION 10% AS STATED I TABLE 10% AS STATED I TABLE 10% AS STATED I TABLE 10% AS STATED I TABLE 6

PARAMETER Supply Voltage Positive Input Voltage SYMBOL VCC VIL VIH
PARAMETER Thermal Impedance Operating Temperature Range SYMBOL MIN --55 MAX 1.02 125

PARAMETER Input Capacitance: VIN = 0V1 Output Capacitance: VOUT = 1. Guaranteed by design. 0V1 SYMBOL CIN COUT MIN --MAX 5 7 UNITS pF

(VCC 125 °C UNLESS OTHERWISE) PARAMETER Input Leakage Current 1 Output Leakage Current

Standby Supply Current, Both ports TTL level inputs -35 -45 Standby Supply Current, Both ports CMOS level inputs -35 -45 Operating Supply Current, Both ports Active -35 -45 Operating Supply Current, One Port Active, One Port Standby -35 -45 Input Low Voltage3 Input High Voltage Output Low Voltage 4 Output High Voltage 1. VCC = 5.5V, VIN = GND to VCC, CS = VIH, VOUT 0 to VCC. 2. Vcc=5.5V; Vout = GND to Vcc 3. VIH max = VCC + 0.3V, VIL min or -1V pulse width ns 4. VCC min, IOL = 4 mA, IOH = -4 mA.


 

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