Details, datasheet, quote on part number: 709149
Part709149
CategoryInterface and Interconnect => Multi-Ports
TitleMulti-Ports
Description4K X 9 Sync, Dual-port RAM, Pipelined
CompanyIntegrated Device Technology, Inc.
DatasheetDownload 709149 datasheet
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Features, Applications
Features

Architecture based on Dual-Port SRAM cells Allows full simultaneous access from both ports High-speed clock-to-data output times Commercial: 8/10/12ns (max.) Low-power operation IDT709149S Active: 1500mW (typ.) Standby: 75mW (typ.) X 9 bits Synchronous operation 4ns setup to clock, 1ns hold on all control, data, and address inputs Data input, address, and control registers Fast 8ns clock to data out

13ns cycle time, 76MHz operation in pipeline mode Self-timed write allows for fast cycle times TTL-compatible, singles 5V (10%) power supply Clock Enable feature Guaranteed data output hold times Industrial temperature range +85C) is available for selected speeds.

Description

The is a high-speed x 9 bit synchronous Dual-Port SRAM. The memory array is based on Dual-Port memory cells to allow simultaneous access from both ports. Registers on control, data, and address inputs provide low set-up and hold times. The timing latitude provided by this approach will allow systems to be designed with very

short cycle times. This device has been optimized for applications having unidirectional data flow or bi-directional data flow in bursts, by utilizing input data registers. The IDT709149 utilizes a 9-bit wide data path to allow for parity at the user's option. This feature is especially useful in data communication applications where it is necessary to use a parity bit for transmission/reception error checking.

Fabricated using IDTs CMOS high-performance technology, these Dual-Ports typically operate on only 800mW of power at maximum high-speed clock-to-data output times as fast 8ns. An automatic power down feature, controlled by CE, permits the on-chip circuitry of each port to enter a very low standby power mode. The IDT709149 is packaged an 80-pin TQFP.

NOTES: 1. All VCC pins must be connected to power supply. 2. All ground pins must be connected to ground supply. 3. Package body is approximately 1.4mm. 4, This package code is used to reference the package diagram. 5. This text does not indicate the orientaion of the actual part-marking.

Symbol V TERM(2) Rating Terminal Voltage with Respect to GND Terminal Voltage Temperature Under Bias Storage Temperature DC Output Current Commercial & Industrial to +7.0 Unit V

NOTES: 1. This is the parameter TA. 2. Industrial temperature: for specific speeds, packages and powers contact your sales office.

NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. VTERM must not exceed Vcc + 10% for more than 25% of the cycle time or 10ns maximum, and is limited < 20mA for the period of VTERM > Vcc + 10%.

Symbol VCC GND V IL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min.

Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions VIN = 3dV VOUT = 3dV Max. 8 9 Unit pF

NOTES: 1. VIL > -1.5V for pulse width less than 10ns. 2. VTERM must not exceed Vcc + 10%.

NOTES: 1. These parameters are determined by device characterization, but are not production tested. 2. 3dV references the interpolated capacitance when the input and output switch from 3V or from to 0V.

DC Electrical Characteristics Over the Operating Temperature and Supply Voltage Range (VCC 10%)

709149S Symbol |ILI| |ILO| V OH Parameter Input Leakage Current(1) Output Leakage Current Output Low Voltage Output High Voltage Test Conditions = 5.5V, VIN V CC VOUT V CC IOL = +4mA IOH = -4mA Min.


 

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