|Category||Interface and Interconnect => Multi-Ports|
|Description||16K X 16 Dual-port RAM|
|Company||Integrated Device Technology, Inc.|
|Datasheet||Download 7026 datasheet
|Cross ref.||Similar parts: 7026A, QS7026, QS7026A|
True Dual-Ported memory cells which allow simultaneous access of the same memory location High-speed access Commercial: 15/20/25/35/55ns (max.) Industrial: 20/25/35/55ns (max.) Military: 20/25/35/55ns (max.) Low-power operation IDT7026S Active: 750mW (typ.) Standby: 5mW (typ.) IDT7026L Active: 750mW (typ.) Standby: 1mW (typ.) Separate upper-byte and lower-byte control for multiplexed bus compatibility
IDT7026 easily expands data bus width to 32 bits or more using the Master/Slave select when cascading more than one device M/S = H for BUSY output flag on Master, M/S = L for BUSY input on Slave On-chip port arbitration logic Full on-chip hardware support of semaphore signaling between ports Fully asynchronous operation from either port TTL-compatible, single 5V (±10%) power supply Available in 84-pin PGA and 84-pin PLCC Industrial temperature range +85°C) is available for selected speeds
NOTES: 1. (MASTER): BUSY is output; (SLAVE): BUSY is input. 2. BUSY outputs are non-tri-stated push-pull.
The is a high-speed x 16 Dual-Port Static RAM. The IDT7026 is designed to be used as a stand-alone Dual-Port RAM as a combination MASTER/SLAVE Dual-Port RAM for 32-bit-or-more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM approach 32bit or wider memory system applications results in full-speed, error-free operation without the need for additional discrete logic. This device provides two independent ports with separate control, address, and I/O pins that permit independent, asynchronous access for reads or writes to any location in memory. An automatic power downDescription
feature controlled by CE permits the on-chip circuitry of each port to enter a very low standby power mode. Fabricated using IDT's CMOS high-performance technology, these devices typically operate on only 750mW of power. The IDT7026 is packaged in a ceramic 84-pin PGA, and a 84-pin PLCC. Military grade product is manufactured in compliance with the latest revision of MIL-PRF-38535 QML, making it ideally suited to military temperature applications demanding the highest level of performance and reliability.
NOTES: 1. All Vcc pins must be connected to the power supply. 2. All GND pins must be connected to the ground supply. 3. Package body is approximately in x.17 in. 4. This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking.
NOTES: 1. All VCC pins must be connected to power supply. 2. All GND pins must be connected to ground supply. 3. Package body is approximately in x.16 in. 4. This package code is used to reference the package diagram. 5. This text does not indicate orientation of the actual part-marking.
Left Port CEL R/WL OEL - I/O15L SEML UBL LBL BUSYL CER R/WR OER - I/O15R SEMR UBR LBR BUSYR M/S VCC GND Right Port Chip Enable Read/Write Enable Output Enable Address Data Input/Output Semaphore Enable Upper Byte Select Lower Byte Select Busy Flag Master or Slave Select Power GroundNOTES: 1. This is the parameter TA. This is the "instant on" case temperature.
Symbol CIN COUT Parameter Input Capacitance Output Capacitance Conditions(2) VIN = 3dV VOUT = 3dV Max. 9 10 Unit pF
NOTES: 1. This parameter is determined by device characterization but is not production tested. 2. 3dV represents the interpolated capacitance when the input and output signals switch from 3V or from to 0V.
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