|Company||Conexant Systems, Inc.|
|Datasheet||Download CX20415 datasheet
The ConexantTM Single-Chip FaxEngine product family consists of the Single-Chip FaxEngine (CXD9450) that contains an embedded modem Digital Signal Processor (DSP), and a separate Integrated Analog (IA) device (20415). This device set, along with the supporting firmware and evaluation system, comprises a complete facsimile machine--needing only power supply, scanner, and printer mechanism components to complete the machine. A system-level block diagram is shown in Figure 1.Features
MC24 Central Processing Unit to 10 MHz CPU clock speed - Memory efficient input/output bit manipulation - 24-bit internal address bus, 8-bit data bus External Bus - Address, data, control, status, and decoded chip select signals support connection to external ROM, SRAM, DRAM and operator panel - 24-bit external address bus - 8-bit data bus Chip selects - ROMCSn for ROM support - CS0n for SRAM - CS1n-CS5n for external I/O - FCSn for FLASH memory support - LCDCS for LCD support DRAM Controller - DRAM is refreshed in Sleep and Stand-by modes 8 MB supported in two blocks - Organizations supported: 8-bit - Single and page mode access support Flash memory support - NAND and NOR-type support - Serial NAND support - NOR-type memory to 2 MB DMA Controller - Six dedicated internal DMA channels for scanner, thermal printer, and T.4/T.6 access of internal and/or external memory. - DMA Channel 2 can be reprogrammed for external access to plain paper inkjet printing
The integrated controller (SCC) provides the majority of the electronics necessary to build a thermal or thermal transfer facsimile machine integrated into a one-chip solution. The controller performs primary facsimile control/monitoring and compression/decompression functions, and interfaces with fax machine components such as a scanner, printer, motor, and operator control panel. The MC24 embedded processor provides an external 16-MB direct memory access capability. An integrated Pipeline ADC, combined with Conexant's Image Processing Scheme, provides state of the art image processing performance on text and gray scale images.
The embedded modem DSP supports V.29 and V.27 ter facsimile transmission and reception, in addition to all basic HDLC functions and T.30 requirements. The modem allows all line connections and single or dual tone generation and detection. Optional features such as V.17, voice compression/decompression for Digital Telephone Answering Machine (DTAM), and duplex speakerphone are also available. Figure 1. Single-Chip FaxEngine System Level Block DiagramLocal Handset Telephone Line Speaker Phone DAA Line IA
CCD or CIS Scanner Thermal Printer or Thermal Transfer Plain Paper Inkjet Printer (Optional)
24 NOR FLASH MB 20 Control Bus Data Bus Address Bus 8 24 DRAM MB 11 SRAM 20 8 ROM MB 20
Single-Chip FaxEngine Family Characteristics and Ordering Information
9600 Single-Chip FaxEngine 9600 Single-Chip FaxEngine with DTAM 9600 Single-Chip FaxEngine with DTAM and Speakerphone Support 14400 Single-Chip FaxEngine 14400 Single-Chip FaxEngine with DTAM 14400 Single-Chip FaxEngine with DTAM and Speakerphone Support20415-11 (one) 20415-11 (one) 20415-11 (two) 20415-11 (one) 20415-11 (one) 20415-11 (two)
Update Current and Power Requirements table, reformat, new product name, add order info to CXD9450 name change.
Information in this document is provided in connection with Conexant Systems, Inc. ("Conexant") products. These materials are provided by Conexant as a service to its customers and may be used for informational purposes only. Conexant assumes no responsibility for errors or omissions in these materials. Conexant may make changes to specifications and product descriptions at any time, without notice. Conexant makes no commitment to update the information and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to its specifications and product descriptions. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Conexant's Terms and Conditions of Sale for such products, Conexant assumes no liability whatsoever. THESE MATERIALS ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, RELATING TO SALE AND/OR USE OF CONEXANT PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, CONSEQUENTIAL OR INCIDENTAL DAMAGES, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. CONEXANT FURTHER DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. CONEXANT SHALL NOT BE LIABLE FOR ANY SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS, WHICH MAY RESULT FROM THE USE OF THESE MATERIALS. Conexant products are not intended for use in medical, lifesaving or life sustaining applications. Conexant customers using or selling Conexant products for use in such applications so at their own risk and agree to fully indemnify Conexant for any damages resulting from such improper use or sale. The following are trademarks of Conexant Systems, Inc.: ConexantTM, the Conexant C symbol, and "What's Next in Communications Technologies"TM. Product names or services listed in this publication are for identification purposes only, and may be trademarks of third parties. Third-party brands and names are the property of their respective owners. For additional disclaimer information, please consult Conexant's Legal Information posted at www.conexant.com, which is incorporated by reference. Reader Response: Conexant strives to produce quality documentation and welcomes your feedback. Please send comments and suggestions to email@example.com. For technical questions, contact your local Conexant sales office or field applications engineer.
Single-Chip FaxEngine and Integrated Analog Device Microprocessor and Bus Interface Features (Cont'd) - Moveable external SRAM memory MB - External ROM memory (covered by ROMCSn) MB - Internal Interrupt controller T.4/T.6 Compression and Decompression in Hardware - MH/MR - MMR - Alternating Compression/Decompression Scanner/Printer Stepper Motor Control - Four outputs to external current drivers for the scanner stepper motor - Four outputs to external current drivers for the printer stepper motor - Programmable for acceleration/deceleration Scanner and Video Control - CIS or CCD scanners supported - 6 programmable control signals - B4/A4 scanner support 5 ms minimum line time - Embedded scanner Pipeline A/D - Line lengths to 2616 pixels - Built-in Programmable Clamping, Analog Gain Control, and Sample/Hold circuits Video Processing - Two modes of shading correction - Dark level correction - Gamma correction and MTF - 2-D Error Diffusion or Dithering - Multi-level B4-A4 fixed resolution conversion Bi-Level Resolution Conversion - Programmable bi-level resolution conversion block provides expansion or reduction on the T.4/T.6 decompressed data or scan image data - Programmable image expansion 200% or reduction down 60% - Vertical line ORing Printer Interface Supports Thermal or Thermal Transfer Printers Optional Plain Paper Inkjet Printer Support Dedicated Interface to Support Operator Panel - 32 key direct support - 8 LED direct support - LCD support Two Synchronous Interface (SSIF) Synchronous/Asynchronous Interface (SASIF) Programmable Tone Generator - Frequency and output levels are programmable
Single-Chip FaxEngine Product Family General Purpose Inputs/Outputs - 38 GPIO and 32 GPO lines are provided Embedded Modem DSP - Supports speeds to 14400 bps and V.21 Channel 2 transmission/reception - Supports HDLC framing and detection - Supports DTMF generation/reception - Supports CID reception External Integrated Analog (IA) Device Optional DTAM Support V24 24 minutes of voice storage per 4 Mbits of memory - ADPCM codec - PCM codec - Near-end echo cancellation Optional Duplex Speakerphone - Speakerphone IA support - Acoustic Echo Cancellation - Line Echo Cancellation or Secondary Acoustic Echo Cancellation Real-Time Clock with Battery Backup Programmable Watchdog Timer EMI Reduction on Pads Stand-by and Sleep Modes to Reduce Power Consumption On-chip or Off-chip Power Up/Down Detection 3.3 V Operation 3.3 V Compatible Interface Compact Packages CXD9450-xx: 176-pin TQFP 20415-xx: 32-pin TQFP (not shown, refer to document number 100550) Modular Firmware - Real-time multitasking environment - Fax transmit, receive, and copy - T.30 protocol - T.4/T.6 compression and decompression hardware support and control - Image expansion or reduction - Page memory functions - Call progress support - Caller ID support Versatile Evaluation System - Provides demonstration, development and evaluation capabilities - MC24 software development tool kit
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