CPLD logic documentation for peripheral bus address decoding, board control and status signals, board revision...

Category: Logic
Manufacture: Freescale Semiconductor, Inc
Datasheet: Download this application note

Peripheral Bus Control
Peripheral Bus Control CPLD
Wireless Solutions Division
Version 0.5 May 3, 2005
Freescale Semiconductor
Peripheral Bus Control
Notes Initial version. Applied appropriate changes to ZAS PBC document to fit Tortola ADS Interrupt controller added to the document. Interrupt description revised Some power up defaults changed, formatting revised, Author Eyal Liser Eyal Liser Eyal Liser Eyal Liser Date March 25, 2005 April 14, 2005 April 18, 2005 May 2, 2005 Version Revision 0.0 Revision 0.1 Revision 0.2 Revision 0.3
Revised interrupt section per OS teams requests UART selects Default changed. Vibrator default value changed. PCMCIA_EN bit added on BCTRL4(5)
Freescale Semiconductor

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